1. Field of the Invention
The present invention relates to an integrated circuit having a buffer with improved current drive capability.
2. Description of the Prior Art
Integrated circuit output buffers are used to drive external conductors with signals generated by the integrated circuit (IC). For this purpose, an estimate is made of the maximum load that is to be driven by the integrated circuit. This load includes the distributed capacitance of the external conductors, and the input capacitance of the circuitry connected thereto. The drive capability of the buffer is designed to be sufficient to charge and discharge that capacitance sufficiently rapidly to obtain the desired performance. In addition, the design must take into account the DC current sinking (and sourcing) required to drive the load. For example, when driving TTL (i.e., transistor transistor logic) inputs, the output buffer must sink approximately 0.8 to 4 milliamps per driven input. In the prior art, these requirements have been met by designing the transistors in the output buffer to be sufficiently large so as to supply both the capacitive (AC) drive capability, and the DC drive capability simultaneously.
Unfortunately, as the speed of digital (e.g., binary) logic circuits increase, the noise generated by the output buffers also increases. This is due to the faster rise and fall times of the buffers, and the greater capacitive current flow. The noise may be transmitted by capacitive coupling between conductors, or result from "ground bounce" caused by the inductance of power supply conductors, for example. Therefore, steps have been taken to minimize the noise problem. One technique is to control the rise and fall times of the output buffers, to compensate for variations in the IC production process. As a result, buffers produced in a "fast" process (i.e., a variation from the nominal process that causes relatively fast circuit speeds) may not generate excessive noise. For example, one technique to maintain relatively constant rise and fall times is described in U.S. Pat. No. 4,823,029 co-assigned herewith. Other factors influencing circuit speed that may be compensated include the operating temperature and the voltage applied to the integrated circuit.
However, the requirement for sinking or sourcing relatively large DC currents at increasingly high speeds makes it desirable to develop improved integrated circuit buffer designs. Furthermore, even output buffers that do not supply large DC currents, as when driving only CMOS loads, can benefit from improvements in noise reduction techniques. The requirements for on-chip buffers, for example bus drivers and clock drivers, have also increased. That is, as the clock rates increase, and the length of the driven conductors increase, there is a greater possibility that excessive noise will be generated.